Cadence Design Systems

Verification Engineer I

Cadence Design Systems
Not Disclosed
0-2 Years Full Time
Noida, Uttar Pradesh, IN

Vacancy: Not Disclosed Posted: 1 year ago Applicants: 1
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Job Description

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Skills Needed to be successful

1) Knowledge of Verilog / System Verilog /

2) Knowledge of Digital Design , Computer Architecture

3) Programming skills in at least one language ( C , Python, Perl , tcl )

4) Analytical mindset ( determine causes of failure, triangulation )

5) UNIX skills will help you get started quickly

6) Clear fundamentals about Electronic Design and FPGAs

Role

The role is of a verification engineer in the Protium Verification team

The role involves two critical actions.

(1) Using the Cloud and compute farm to run the existing verification suite , analyze failures, benchmark performance, report bugs.

(2) Creating new tests to verify newly developed functionality for the Protium FPGA Prototyping platform. Both these actions go hand in hand as we develop a new solution. Over a period of time , engineers can build skills in writing HDL tests, Using FPGAs for Prototyping , UNIX, Usage for farms to run compute loads.

Skills Required: Unix, HDL, Prototype


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